How to Debounce a Switch in an FPGA

Fix button glitches on your development board

If you are using a development board that has switches, you should be careful. Physical switches such as push buttons and toggle switches are all subject to bouncing. Bouncing occurs when the switch is toggled or flipped. It happens in all switches as a result of the metal contacts coming together and apart quickly before they have time to settle out.

The image above shows the transition from logic low to logic high of a switch closing. One would expect a nice clean transition. However the spikes are where the switch contacts create glitches on the line. Imagine if this switch was used to start some task in your code. The task would be started and stopped many times very rapidly. This would create unwanted behavior. This switch is in need of some debounce filtering!

To do this in an FPGA, the simplest thing to do is to create a process (in VHDL) or an always block (in Verilog) that samples the switch input. Once the switch input has been stable for enough time, the input is stable and can be sent to the rest of your code. A good amount of time for this is several milliseconds at a minimum.

Your process or always block should be sampling the switch input all the time. Once it sees the switch input is different from its output, it should enable a counter. If the counter reaches the end, the output is reassigned to match the input. This happens because the switch was stable for long enough. Congratulations, you now have a stable debounced signal that you can use with your FPGA logic!